Overview

Copper lead frame etching produces the fine-pitch lead fingers, die pads and tie bars that connect a semiconductor die to its package, by photochemical machining of rolled copper alloy strip. Fine-grain dry film is laminated to both faces, the pattern is exposed and developed, and a matched etchant cuts the outline while half-etching thins the lead tips and die pad in the same pass. Materials are usually C1100, C19400 (CuFe2P), C7025 or KFC copper alloys, plus low-expansion Ni-Fe Alloy 42, at 0.10–0.5 mm, with 0.15–0.25 mm typical for fine-pitch frames. Because no die touches the strip, leads leave the line burr-free and stress-free, with coplanarity that holds through die attach and molding.

For a buyer, copper lead frame etching is judged on fine-pitch capability and coplanarity. Lead widths reach 0.08 mm at 0.15 mm pitch, where a 0.01 mm undercut already consumes more than a tenth of the finger, so the etch factor must be documented and compensated lead by lead in the artwork. Half-etching forms tip recesses and pad steps in one pass, improving mold lock and wire-bond access, while the chemically active, uniform surface takes selective silver on the die pad and Ni/Pd/Au on the leads evenly. Strip flatness directly drives bond yield, so gauge, side-etch and anneal have to be controlled together.

Parameter Window

• Available Materials: C1100 / C19400 (CuFe2P) / C7025 copper alloys, KFC, Ni-Fe Alloy 42, with selective Ag / Ni / Pd / Au plating
• Material Thickness Range: 0.10–0.5 mm (0.15–0.25 mm typical for fine-pitch frames)
• Tolerance: ±0.01 mm on lead width and pitch; ±0.02 mm on outer profile; coplanarity within 0.03 mm
• Minimum Feature: 0.08 mm lead width at 0.15 mm pitch; half-etched lead tips to 50 % of gauge; minimum dam bar 0.10 mm
• Surface Options: selective silver on die pad, Ni/Pd/Au pre-plating, matte tin, anti-tarnish, roughened bond surface
• Compliance: ISO 9001 process control, RoHS/REACH material traceability

Manufacturing Process / Workflow (8 Steps)

1. Alloy & Temper Selection — Choose C19400 for strength, C7025 for conductivity, or Alloy 42 for low expansion; confirm temper.
2. Fine-Pitch Artwork — Compensate every lead for the etch factor, since a 0.01 mm undercut is a large fraction of a 0.08 mm finger.
3. Cleaning & Lamination — Laminate fine-grain dry film to both faces in a clean area to protect narrow fingers from particles.
4. Two-Sided Exposure — Register top and bottom films to the strip datum so lead tips align after etching.
5. Development & Inspection — Open lead and pad areas, then inspect for resist bridging between adjacent fingers.
6. Half-Etch & Through-Cut — Etch from both sides; time the bath to thin lead tips and pads while separating the outline.
7. Stripping & Selective Plating — Strip, then plate Ag on die pads and Ni/Pd/Au on leads for bondability and corrosion resistance.
8. Coplanarity & Reel Packing — Verify lead planarity, pitch and burr-free edges, then reel or tray pack for die attach.

Core Advantages

1. Fine pitch without dies: Lead widths to 0.08 mm at 0.15 mm pitch are formed chemically, with no stamping die to wear.
2. Controlled undercut: A documented etch factor lets narrow fingers land on width, so electrical and molding clearance stay in spec.
3. Half-etched lead tips: Pad recesses and thinned tips are made in the same pass, improving mold lock and wire-bond access.
4. Burr-free and stress-free: No die roll or residual stress, so leads stay coplanar and do not spring after singulation.
5. Plating-ready surface: Chemical removal leaves an active, uniform surface that takes selective Ag or Ni/Pd/Au evenly.
6. Fast revision: A new pinout is a new film, so package variants reach prototype without a new stamping tool.

Typical Applications

• IC packages: QFP, QFN and SOIC lead frames with fine-pitch fingers and exposed die pads.
• Power devices: Copper frames for MOSFETs and IGBTs with thick pads for current and heat spreading.
• LED lead frames: Silver-plated pads and reflectors for high-brightness LED packages.
• Sensor & MEMS packages: Low-stress frames where coplanarity protects delicate wire bonds.
• Discrete semiconductors: Diode and transistor frames with half-etched tie bars for mold locking.
• RF & microwave packages: Alloy 42 frames matched to low thermal expansion and controlled impedance.

Design Notes & Process Considerations

1. Etch factor first: Publish the etch factor and compensate artwork; on a 0.08 mm lead, a 0.01 mm undercut is 12 % of width.
2. Pitch and lead width: State both with tolerance; fine pitch below 0.15 mm needs thinner strip to control sidewall taper.
3. Coplanarity: Call out lead planarity across the strip, because warped leads cause missed wire bonds and mold flash.
4. Half-etch zones: Define tip and pad recess depth as a percentage of gauge and keep them off the bond shelf.
5. Selective plating: Specify Ag thickness on the die pad and Ni/Pd/Au on leads, and confirm plating will not bridge fine gaps.
6. Tie bar & dambar: Keep copper lead frame etching tie bars wide enough to survive etching, handling and molding before trim.