Semiconductor Photo Etching Process

Semiconductor photo etching process, also known as semiconductor photochemical etching, is a microfabrication technology that integrates photolithography masking and selective chemical material removal on semiconductor wafers. It transfers miniature circuit or structural patterns onto silicon, silicon dioxide, silicon nitride and other thinfilm layers. Different from highenergy plasma dry etching, semiconductor photo etching mainly relies on liquidphase chemical reaction to dissolve unmasked regions. It is widely adopted for MEMS devices, power semiconductors, sensor chips, waferlevel packaging and sacrificiallayer release processes. It is less common for advanced nanometernode logic chips, where vacuum plasma dry etching dominates.

Semiconductor photo etching shares the same core “photomask + chemical etch” principle as industrial metal photochemical etching, yet it operates under strict semiconductorgrade cleanroom conditions, with ultrahigh purity chemicals, particlefree processing and nanoscalelevel surfacedefect control.

Complete Workflow of Semiconductor Photo Etching Process

Step 1: Wafer PreCleaning

Particle contamination, organic residues and native oxide on wafer surface will cause pattern defects. RCA standard cleaning is generally performed to remove impurities and guarantee good photoresist adhesion.

Step 2: ThinFilm Deposition

Target functional thinfilms are formed on silicon substrate via thermal oxidation, PECVD, LPCVD or sputtering. Common materials include SiO₂, Si₃N₄, polysilicon and some metal layers which will be patterned in subsequent photoetching steps.

Step 3: Photoresist Coating

Uniform thinlayer photoresist is spincoated onto wafer surface. Spin speed determines photoresist thickness. Two main photoresist categories are positive photoresist and negative photoresist.

Step 4: Soft Bake

Thermal softbake evaporates solvent inside photoresist layer, improving film density and adhesion to avoid sticking during exposure.

Step 5: UV Exposure Through Photomask

Precise photomask carries designed circuit or structure patterns. UV light passes through transparent areas of the mask to irradiate photoresist. Chemical property of exposed photoresist changes accordingly.

Step 6: Development

Developer solution dissolves exposed (positive resist) or unexposed (negative resist) photoresist. After development, the photoresist replicates mask patterns and acts as protective etching mask on top of wafer thinfilm. Hardbaking follows to further stabilize photoresist.

Step 7: Photo Chemical Etching (Wet Etch)

The wafer is immersed in temperaturecontrolled highpurity chemical etchant bath. Areas without photoresist coverage are selectively dissolved away. The masked regions remain intact. Since liquid chemical etching is isotropic, etching proceeds both vertically downwards and laterally under mask edges, creating undercut. This undercut effect is the major limiting factor for ultrafine nanoscale patterns.

Step 8: Photoresist Stripping

After etching completes, residual photoresist is stripped off using stripper liquid or plasma ashing, exposing the patterned thinfilm surface.

Step 9: PostEtch Cleaning & Inspection

Wet cleaning removes etchant residue and particles. Metrology inspection checks etch depth, pattern dimension, undercut amount, surface roughness and detects defects such as pinholes or incomplete etching.

Core Technical Indicators for Semiconductor Photo Etching

1. Etch Selectivity: Etch rate ratio between target thinfilm and underlying substrate / photoresist mask. High selectivity ensures etchant removes target layer while barely attacking base silicon or photoresist.

2. Etch Rate: Stable removal speed, controlled by etchant concentration, temperature and agitation. Batchtobatch repeatability is critical for wafertowafer consistency.

3. Undercut: Lateral etching distance below photoresist mask, inherent feature of isotropic wet photo etching, must be calculated and compensated at DFM design stage.

4. Uniformity: Etch depth and pattern dimension consistency across whole wafer surface. Poor uniformity directly leads to partialwafer device failure.

5. Surface Quality: Low surface roughness, zero particle residue, no pinhole defects after etching.

Semiconductor Photo Etching VS Dry Plasma Etching

Typical Application Scenarios

1. MEMS Microelectromechanical Systems: Pressure sensors, inertial sensors, microfluidic chips. Photo etching releases movable microstructures by sacrificiallayer etching.

2. Power Semiconductor Devices: Pattern silicon dioxide passivation layer, opening contact windows for thyristors, diodes and IGBT chips.

3. WaferLevel Packaging: Opening passivation windows, removing partial dielectric layers for packaging interconnection.

4. Sensor Chips & Optical Devices: Pattern optical windows and microaperture arrays on thin dielectric films.

5. Researchlab prototyping: Smallbatch wafer process verification for university and institute R&D projects.

Key Limitations of Semiconductor Photo Etching

The biggest limitation comes from isotropic undercut effect. When feature size shrinks down to submicron or nanometer range, lateral undercut cannot be controlled, which makes wet photo etching unable to meet advancednode logic chip requirements. For those scenarios, industry switches to anisotropic dry plasma etching.

Besides undercut, etchant temperature fluctuation and chemicalsolution aging will change etch rate and bring dimension drift, demanding strict process control. Particle contamination must be avoided throughout all cleanroom steps.

Distinction from Industrial Metal Photo Etching

Although both adopt “photolithography plus chemical etching”, semiconductor photo etching processes siliconbased wafers in Classlevel cleanrooms, applying electronicgrade ultrapure chemicals, targeting microelectronic devices. Industrial photo etching processes metal sheets such as stainless steel, nickel and copper for energy, medical and mechanical components, with micrometerlevel tolerance and general factory workshop environment.

Conclusion

Semiconductor photo etching process combines photolithography patterning and wet chemical etching. It delivers highselectivity, costeffective wafer microfabrication solution, mainly used for MEMS, power semiconductors, sensors and waferlevel packaging. Restricted by inherent isotropic undercut, it cannot handle nanometerscale ultrafine patterns, where dry plasma etching takes over. Balancing etch selectivity, undercut amount, uniformity and surface cleanliness determines final wafer yield and device reliability.